A MULTIPROCESSOR Nios II IMPLEMENTATION OF DUFFING OSCILLATOR ARRAY FOR WEAK SIGNAL DETECTION

Abstract

Field programmable gate array (FPGA) implemented array of Duffing oscillators for weak signal detection in noisy environments is presented in this paper. The array of Duffing oscillators is an efficient method for detecting weak signals with unknown exact frequency and phase delay. Because of the high computation resource requirement, especially for online weak signal detection, hardware implementation is a proper solution. In this FPGA implementation, the array was constructed using multiprocessor Nios II system. In the proposed multiprocessor system, each oscillator was implemented by a separate Nios II processor. Also, a separate Nios II processor was dedicated to control and detect the state of other oscillators. The proposed system was implemented using one of the Altera's Cyclone IV GX FPGAs. In this paper, beside the structure and resource utilization of the array of oscillators, an experimental result was also presented in order to show effectiveness of the implementation.