Design of a New Low Power Fully Differential Amplifier with Settling Time Enhancement Characteristics

Author:

Hosseinipouya Seid Jafar1,Dastadast Farhad1

Affiliation:

1. Department of Electrical Engineering, Izeh Branch Islamic Azad University, Izeh, Iran

Abstract

High performance of fully differential operational transconductance amplifier is designed and implemented using a 0.18-μm CMOS process. The implemented op-amp uses common mode feedback (CMFB) circuit operating in weak inversion region which does not affect other electrical characteristics due to eliminating common mode (CM) levels automatically leading to improve CM rejection ratio (CMRR) of the amplifier significantly. Moreover, the output stage has class-AB operation so that its current can be made larger due to increasing the output current dynamically using adaptive biasing circuit. Additionally, the AC currents of the active loads have been significantly reduced using negative impedances to increase the gain of the amplifier. The results show the GBW 2.3 MHz, slew rate 2.6 V/μs and 1% settling time 150 ns with a capacitive load of 15 pF. This amplifier dissipates only 6.2 μW from a 1.2 V power supply.

Publisher

World Scientific Pub Co Pte Lt

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Electrical and Electronic Engineering,Hardware and Architecture

Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. The Application of Common-Mode Feedback in Operational Amplifiers;2023 IEEE 5th International Conference on Power, Intelligent Computing and Systems (ICPICS);2023-07-14

2. Slew rate boosting technique for an upgraded transconductance amplifier;Analog Integrated Circuits and Signal Processing;2016-04-19

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