Positive and Negative Feedback for Linearity Improvement and PVT Compensation of the Ramp Generator

Abstract

Linearity of ramp signals is one of the most important aspects for many applications such as single-slope analog to digital converters (ADCs); another important aspect is the total power dissipation. Applications like high-resolution single-slope ADCs that can be used in portable devices demanded accurate ramp generator with low power dissipation. This paper presents a low power ramp generator with linearity improvement that achieved by a positive feedback circuit and negative feedback for compensation of the variations in process, voltage and temperature. Derived equations of the proposed ramp generator circuit show that linearity of the output ramp, with proper choosing of device sizes, can be enhanced significantly. Also, for proving of linearity enhancement, the circuit design and post-layout simulations were done in TSMC 0.18[Formula: see text][Formula: see text]m and 90[Formula: see text]nm CMOS technologies. Simulation results show that linearity of the circuit improved by a factor of 8 and total ramp resolution improved about 3 bit, whereas power dissipation of the circuit is about 8[Formula: see text][Formula: see text]W and entire layout core area is near 800[Formula: see text][Formula: see text]m2.