Identification of Hardware Trojan in Gate-Level Netlist
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Published:2023-12-26
Issue:
Volume:
Page:
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ISSN:0218-1266
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Container-title:Journal of Circuits, Systems and Computers
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language:en
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Short-container-title:J CIRCUIT SYST COMP
Author:
Mondal Anindan1ORCID,
Ghosh Archisman1ORCID,
Karmakar Shubrojyoti1ORCID,
Mahalat Mahabub Hasan1ORCID,
Roy Suchismita1ORCID,
Sen Bibhash1ORCID
Affiliation:
1. Computer Science and Engineering, National Institute of Technology, Durgapur, 713209, India
Abstract
Hardware Trojans (HT) are tiny, malicious circuits intentionally designed by an adversary. The existing works found in the literature on gate-level netlists are mainly based on supervised classification with few attempts at unsupervised clustering. However, the over-reliance on pre-defined structural features used in these supervised classification methods makes them vulnerable to the new Trojan attacks, whereas most unsupervised methods ignore this feature completely. This work presents an unsupervised approach for HT net detection based on the structural features required for small rare-event triggered HTs irrespective of the payload. The proposed work uses k-means clustering on these features to reduce the search space. A new metric based on combinational controllability is applied next to detect the possible trigger net. Experimental results of fifteen selected Trust-HUB benchmarks show the capability of the proposed technique against different types of HT triggers. Results show that the proposed approach reduces the search space massively (up to 99%) while running within a reasonable time frame.
Publisher
World Scientific Pub Co Pte Ltd
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Electrical and Electronic Engineering,Hardware and Architecture