Comparative Study Between Two Novel BJT-DVCC and CMOS-DVCC

Abstract

In this paper, a comparative study between performance of BJT and CMOS technologies is performed by implementing two novel BJT and CMOS differential voltage current conveyors (DVCCs) with minimum and equivalent sizes. In this study, “size” means the number of the transistors used in a design. The CMOS-DVCC consists of only 12 MOS transistors, and the BJT-DVCC includes 13 BJTs. The implementations are performed in Proteus-7 environment, and the two DVCCs are formulized with their real parameters. The two chips are modeled at low frequency, and it is shown that the CMOS-DVCC has acceptable performance and behavior to operate as a DVCC while the parameters of the BJT-DVCC are far from an ideal DVCC, so the CMOS-DVCC can be used to design electronic devices. The comparative analysis shows to achieve a reliable and acceptable BJT implementation of a DVCC, it is inevitable to increase the size of the BJT implementation. To prove this claim, another novel acceptable BJT-DVCC with larger size is presented and modeled. It is also demonstrated that the acceptable BJT-DVCC is also the first and only DVCC reported in the literature which is applicable to high-power applications, and this is the other contribution of this work.