Inductive Feedback Technique for Design of High Gain 0.18μm CMOS LNA for 5G Applications-Reference-Cited by-同舟云学术

Inductive Feedback Technique for Design of High Gain 0.18μm CMOS LNA for 5G Applications

Published:2021-05-12 Issue:13 Volume:30 Page:
ISSN:0218-1266
Container-title:Journal of Circuits, Systems and Computers
language:en
Short-container-title:J CIRCUIT SYST COMP

Author:

Banu Anjana Jyothi¹^ORCID,Kavya G.¹,Jahnavi D.²

Affiliation:

1. Department of Electronics & Communication Engineering, S.A. Engineering College, Avadi, Chennai, Tamil Nadu, India

2. Information & Communication Engineering, Anna University, Chennai, Tamil Nadu, India

Abstract

A 26[Formula: see text]GHz low-noise amplifier (LNA) designed for 5G applications using 0.18[Formula: see text][Formula: see text]m CMOS technology is proposed in this paper. The circuit includes a common-source in the first stage to suppress the noise in the amplifier. The successive stage has a Cascode topology along with an inductive feedback to improve the power gain. The input matching network is designed to achieve the input reflection coefficient less than [Formula: see text]7dB at the intended frequency. The matching network at the output is designed using inductor–capacitor (LC) components connected in parallel to attain the output reflection coefficient of [Formula: see text]10[Formula: see text]dB. Due to the inductor added in feedback at the second stage. The [Formula: see text] obtained is 18.208[Formula: see text]dB at 26[Formula: see text]GHz with a noise figure (NF) of 2.8[Formula: see text]dB. The power supply given to the LNA is 1.8[Formula: see text]V. The simulation and layout of the presented circuit are performed using Cadence Virtuoso software.

Funder

Indian Space Research Organization

Publisher

World Scientific Pub Co Pte Ltd

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Electrical and Electronic Engineering,Hardware and Architecture

Link

https://www.worldscientific.com/doi/pdf/10.1142/S0218126621502364

Reference23 articles.

1. A 0.18-$\mu{\hbox {m}}$ CMOS Balanced Amplifier for 24-GHz Applications

2. A Low-Power Low-Noise Amplifier for K-Band Applications

3. A 3–10-GHz Low-Power CMOS Low-Noise Amplifier for Ultra-Wideband Communication

4. A 5 GHz 0.95 dB NF Highly Linear Cascode Floating-Body LNA in 180 nm SOI CMOS Technology

5. A Ka-Band Low Noise Amplifier Using Forward Combining Technique