Makespan Minimization for Multiprocessor Real-Time Systems under Thermal and Timing Constraints

Author:

Hua Jing1ORCID,Peng Yingqiong1,Xu Yilu1,Cao Kun2,Jia Jing1

Affiliation:

1. School of Software, Jiangxi Agricultural University, Nanchang 330045, P. R. China

2. Department of Computer Science and Technology, East China Normal University, Shanghai 200241, P. R. China

Abstract

With the continued scaling of the CMOS device, the exponential increase in power density has strikingly elevated the temperature of on-chip systems. In this paper, the problem of allocating and scheduling frame-based real-time applications is addressed to multiprocessors to minimize the makespan under the thermal and timing constraints. The proposed algorithms consist of offline and online components. The offline component assigns the applications accepted at static time to processors in a way that the finish time of processors are balanced. The online component firstly selects the processor with the highest allocation probability for each application accepted at runtime. The allocation probability is calculated by taking the processor workload and temperature profiles into consideration. The higher allocation probability of a processor shows the better performance with respect to makespan and temperature can be achieved by executing the application on this processor. Then, the operating frequencies of applications are determined by making the most of slack in order to reduce the peak temperature under the timing constraint. Extensive simulations were performed to validate the effectiveness of the proposed approach. Experimental results have shown that the static makespan of the proposed scheme is very close to the optimal schedule length within a small margin varying from 0.118[Formula: see text]s to 0.249[Formula: see text]s, and the dynamic makespan of the proposed scheme can be adapted to satisfy varying system design constraints. The peak temperature of the proposed algorithms can be up to [Formula: see text] lower than that of the benchmarking schemes.

Publisher

World Scientific Pub Co Pte Lt

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Electrical and Electronic Engineering,Hardware and Architecture

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