Fast Transaction-Level Model for Direct Memory Access Controller-Reference-Cited by-同舟云学术

Fast Transaction-Level Model for Direct Memory Access Controller

Published:2019-03-31 Issue:04 Volume:28 Page:1950059
ISSN:0218-1266
Container-title:Journal of Circuits, Systems and Computers
language:en
Short-container-title:J CIRCUIT SYST COMP

Author:

Safar Mona¹,El-Moursy Magdy A.²³^ORCID,Tarek Ahmed⁴,Emad Ahmed⁴,Hesham Ahmed⁴,Salem Ashraf²,Mahroos Mohsen⁴

Affiliation:

1. Computer Engineering and Systems Department Faculty of Engineering, Ain-Shams University Cairo, Egypt

2. Integrated Circuits Verification Solutions Division, Mentor, A Siemens Business, Cairo, Egypt

3. Microelectronics Division, Electronics Research Institute, Cairo, Egypt

4. Electronics and Electrical Communications Department, Faculty of Engineering, Cairo University, Giza, Egypt

Abstract

Transaction-Level Modeling (TLM) has been widely used in system-level design in the past few years. Simulation speed of Virtual Platforms (VPs) depends mainly on the transactions which are initiated by the Programmer’s View (PV) models of the VP devices. PV models are required to run at highest simulation speed. Data bus width as a hardware (HW) parameter should not reduce simulation speed of the modeled transactions. Furthermore, HW-related parameters should only be accounted for when considering timing of the models. A fast SystemC-TLM model is developed for the widely used ARM PrimeCell PL080 DMAC IP. The performance of the proposed model is validated against a developed RTL model for the same device. The effect of the transactions granularity on simulation speed is determined. Different programmed transfers are simulated and compared with open-source Quick Emulator (QEMU)-based models. The developed model is compared with the developed RTL, the open-source QEMU model, and the existing ARM Fast Model (AFM). It is shown that simulation time of the developed model is reduced by two orders of magnitude as compared to the other existing models.

Publisher

World Scientific Pub Co Pte Lt

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Electrical and Electronic Engineering,Hardware and Architecture

Link

https://www.worldscientific.com/doi/pdf/10.1142/S0218126619500592

Reference6 articles.

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3. Transaction Level Modeling with SystemC