A low dark count rate single photon avalanche diode with standard 180 nm CMOS technology

Abstract

A single photon avalanche diode (SPAD) structure designed with standard 180 nm CMOS technology is investigated in detail. The SPAD employs a [Formula: see text]-well anode, rather than the conventional [Formula: see text] layer, and with a [Formula: see text]-well/deep [Formula: see text]-well junction with square shape, a deep retrograde [Formula: see text]-well virtual guard ring which prevents the premature edge avalanche breakdown. The analytical and simulation results show that the SPAD exhibits a uniform electric field distribution in [Formula: see text]-well/deep [Formula: see text]-well junction with the active area of [Formula: see text], and the avalanche breakdown voltage is as low as 9 V, the peak of the photon detection efficiency (PDE) is about 33% at 500 nm, the relatively low dark count rate (DCR) of 0.66 KHz at room temperature is obtained.