A Chaotic Block Cryptographic System Resistant to Power Analysis Attack

Abstract

The securities of chaotic cryptographic systems are widely evaluated by conventional tests such as the character frequency test, entropy test and avalanche test. However, when the chaotic cryptosystem is in operation, side channel information such as power consumption, and electromagnetic radiation is leaked. The side channel information can be used to attack the cryptosystem, e.g. the side channel attack (SCA), which is a threat for the security of chaotic cryptographic systems. This paper proposes a chaotic block cryptographic algorithm that can resist the SCA, with the aim of enhancing the security of chaotic cryptosystems. Masking and hiding mechanisms are used in this work. By using the former, the intermediate data correlated with the plaintexts/keys are masked by random numbers, thus no direct correlation exists between the power consumption and the plaintexts/keys and the first order SCA can be counteracted. By using the latter, additional noise is added to the side channel information by randomizing the operation sequence of the algorithm. Combining these two methods, the higher order SCA can be counteracted. To evaluate the security of the proposed system, the correlation power analysis attacks are carried out based on the target device of an Atmel XMEGA microcontroller. For the proposed system, the correlation coefficient calculated from the correct key is not larger than the incorrect keys. However, for the unprotected cipher system, the correlation coefficient calculated from the correct key is 0.8 and the coefficients calculated from the incorrect keys are less than 0.5, i.e. the system can be attacked. Experimental results demonstrate that the proposed cryptosystems can counteract the correlation power analysis attacks and maintain the security performance for the chaotic cryptographic systems.