DERIVING PROCESS NETWORKS FROM NESTED LOOP ALGORITHMS

Author:

RIJPKEMA EDWIN1,DEPRETTERE ED F.1,KIENHUIS BART2

Affiliation:

1. Leiden University, Niels Bohrweg 1 2333 CA Leiden, The Netherlands

2. University of California, Berkeley, CA 94720, USA

Abstract

High level modeling and (quantitative) performance analysis of signal processing systems requires high level models for the applications (algorithms) and the implementations (architectures), a mapping of the former into the latter, and a simulator for fast execution of the whole. Signal processing algorithms are very often nested-loop algorithms with a high degree of inherent parallelism. This paper presents – for such applications – a suitable application model and a method to convert a given imperative executable specification to a specification in terms of this application model. The methods and tools are illustrated by means of an example.

Publisher

World Scientific Pub Co Pte Lt

Subject

Hardware and Architecture,Theoretical Computer Science,Software

Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Data-aware process networks;Proceedings of the 30th ACM SIGPLAN International Conference on Compiler Construction;2021-02-27

2. Dynamic Dataflow Graphs;Handbook of Signal Processing Systems;2018-10-14

3. Dynamic Dataflow Graphs;Handbook of Signal Processing Systems;2013

4. pn: A Tool for Improved Derivation of Process Networks;EURASIP Journal on Embedded Systems;2007

5. Translating Imperative Affine Nested Loop Programs into Process Networks;Embedded Processor Design Challenges;2002

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