NOISE ANALYSIS IN A 0.8 V FORWARD BODY-BIAS CMOS OP-AMP DESIGN-Reference-Cited by-同舟云学术

NOISE ANALYSIS IN A 0.8 V FORWARD BODY-BIAS CMOS OP-AMP DESIGN

Published:2004-06 Issue:02 Volume:04 Page:L403-L412
ISSN:0219-4775
Container-title:Fluctuation and Noise Letters
language:en
Short-container-title:Fluct. Noise Lett.

Author:

ZHANG C.¹,SRIVASTAVA A.¹,AJMERA P. K.¹

Affiliation:

1. Department of Electrical and Computer Engineering, Louisiana State University, Baton Rouge, LA 70803-5901, USA

Abstract

Noise model of a MOSFET, which includes the effect of forward-body bias, is proposed. Thermal noise and shot noise are extracted and their variations with the forward body-bias are compared. It is found that the shot noise increases with the forward body-bias and becomes significant above 0.4 V forward bias. A CMOS op-amp is designed utilizing forward body-bias technique combined with a level shift current mirror. The designed amplifier dissipates power of 40 μW and operates at ± 0.4 V to achieve a gain of 77 dB. The noise in this ultra low-power op-amp is also investigated. The total simulated output noise density of 320×10-12 V 2/ Hz in the ultra-low power op-amp design is slightly lower than the calculated 413×10-12 V 2/ Hz value from the proposed model.

Publisher

World Scientific Pub Co Pte Lt

Subject

General Physics and Astronomy,General Mathematics

Link

https://www.worldscientific.com/doi/pdf/10.1142/S0219477504001975

Reference6 articles.

1. Designing 1-V op amps using standard digital CMOS technology

2. 1-V power supply CMOS cascode amplifier

3. A Fast ALU Design in CMOS for Low Voltage Operation

4. P. Gray and R. Meyer, Analysis and Design of Analog Integrated Circuits (Wiley, 1993) pp. 744–747.

5. Effect of forward and reverse substrate biasing on low-frequency noise in silicon PMOSFETs

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