ANALYSIS OF SPATIAL AND ENERGY SLOW TRAP PROFILE IN HfO2/SiO2 METAL-OXIDE-SILICON DEVICES BY LOW FREQUENCY NOISE MEASUREMENTS

Author:

ZAFARI LEILY1,JOMAAH JALAL1,GHIBAUDO GERARD1,FAYNOT OLIVIER2

Affiliation:

1. IMEP-LAHC, Minatec/INP Grenoble, BP 257, 38016 Grenoble, France

2. CEA-LETI/Minatec, 17 rue des Martyrs, 38054 Grenoble, France

Abstract

A specific model for the low frequency (LF) noise in SiO 2/ HfO 2 metal-oxide-semiconductor devices on fully depleted silicon-on-insulator (FD-SOI) is proposed based on a proper spatial and energy slow trap profile. This model relates the spatial position of the probed traps with the applied vertical electric field in the gate dielectric via their energy distribution and thereby enables to explain the behaviour of LF noise regarding the front and back gate voltages. The dependence of the trap profile and thus the noise level on the interfacial layer thickness is also analysed by the model.

Publisher

World Scientific Pub Co Pte Lt

Subject

General Physics and Astronomy,General Mathematics

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