CIRCUIT INTEGRATION THROUGH LATTICE HYPERTERMS

Abstract

Reducing the size of a logic circuit through lattice identities is an important and well-studied discrete optimization problem. In this paper, we consider a related problem of integrating several circuits into a single hypercircuit using the recently developed concept of lattice hyperterms. We give a combinatorial algorithm for integrating k-out-of-n symmetrical diagrams which play an important role in reliability theory. Our results show that the integration can reduce the number of circuit gates by more than twice.