COVERING OF TRANSIENT SIMULATION OF FEEDBACK-FREE CIRCUITS BY BINARY ANALYSIS

Abstract

Transient simulation of a gate circuit is an efficient method of counting signal changes occurring during a transition of the circuit. It is known that this simulation covers the results of classical binary analysis, in the sense that all signal changes appearing in binary analysis are also predicted by the simulation. For feedback-free circuits of 1- and 2-input gates, it had been shown that the converse also holds, if wire delays are taken into account. In this paper we generalize this result. First, we prove that, for any feedback-free circuit N of arbitrary gates, there exists an expanded circuit[Formula: see text], constructed by adding a number of delays to each wire of N, such that binary analysis of [Formula: see text] covers transient simulation of N. For this result, the number of delays added to a wire is obtained from the transient simulation. Our second result involves adding only one delay per wire, which leads to the singular circuit[Formula: see text] of N. This result is restricted to circuits consisting only of gates realizing functions from the set [Formula: see text], functions obtained by complementing any number of inputs and/or the output of a function from [Formula: see text], and FORKS. The numbers of inputs of the AND, OR and XOR gates are arbitrary, and all functions of two variables are included. We show that binary analysis of such a circuit [Formula: see text] covers transient simulation of N. We also show that this result cannot be extended to arbitrary gates, if we allow only a constant number of delays per wire.