Optimal Parallel Machine Allocation Problem in IC Packaging Using IC-PSO: An Empirical Study

Author:

Cuckler Robert1,Chang Kuo-Hao1,Hsieh Liam Y.2

Affiliation:

1. Department of Industrial Engineering and Engineering Management, National Tsing Hua University, Hsinchu 30013, Taiwan

2. Department of Systems Engineering and Operations Research, George Mason University, Fairfax VA 22030, USA

Abstract

We model and apply a stochastic-simulation-based methodology to optimize the machine allocation of a flexible flow shop (FFS) dedicated to integrated circuit (IC) packaging. This contrasts with most previous research on non-deterministic FFS problems wherein stochastic simulation is mostly used to estimate throughput, cycle time, delay cost, or some other measure(s) in order to compare the performances of already-existing heuristic-based algorithms. The methodology applied in this research, called progressive simulation metamodeling for IC Packaging (IC-PSO), while rooted in the traditional metamodeling technique known as Response Surface Methodology (RSM), contrasts with RSM in that it is equipped with well-designed mechanisms to ensure an ever-increasing solution quality in an attempt to achieve the desirable optimality. The computational efficiency that IC-PSO affords IC packaging companies is demonstrated via a numerical study. Meanwhile, an empirical study based on real data was conducted to validate the viability of the proposed methodology in real settings.

Publisher

World Scientific Pub Co Pte Lt

Subject

Management Science and Operations Research,Management Science and Operations Research

Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Metamodeling-based simulation optimization in manufacturing problems: a comparative study;The International Journal of Advanced Manufacturing Technology;2022-03-28

2. Metamodel-based simulation optimization: A systematic literature review;Simulation Modelling Practice and Theory;2022-01

3. Efficient Due-Date Quoting and Production Scheduling for Integrated Circuit Packaging With Reentrant Processes;IEEE Transactions on Components, Packaging and Manufacturing Technology;2018-08

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