FPGA-Based Reduced Switch Novel Infinite-Level Inverter

Abstract

The evolution of multi-level inverters (MLIs) has led to an increase in their efficiency and reliability. This paper demonstrates an FPGA-based reduced switch novel Infinite-Level Inverter. Conventional two-level Voltage Fed Inverters (VFI) suffer from reduced efficiency, greater voltage distortion and higher switching losses. Multi-level inverters (MLI) outweigh the conventional inverter in terms of improved voltage profile, reduced switching losses, increased efficiency and lower component count. This paper demonstrates an FPGA-based Reduced Switch Novel Infinite-Level Inverter that achieves infinite voltage output levels; with a reduced count of passive and active elements. The proposed inverter has a high DC-link utilization factor of 1.23, reduced blocking voltage and inverter switching losses, employing a single DC source and least number of components. It outputs a sinusoidal voltage with a minimum voltage distortion of 2.1%, which lies within the approved limits of IEEE 519-2014 standard. Comparative studies of the proposed inverter are conducted with different multi-level inverter configurations. FPGA-based control of the proposed inverter reduces execution time and enhances the control performance of the inverter. Evidently, the low cost function of the proposed inverter indicates the economic feasibility of the developed inverter for low-power, low-cost applications.