USE OF ROBUST PREDICTIVE METHOD FOR NANO-CMOS PROCESS: APPLICATION TO BASIC BLOCK ANALOG CIRCUIT DESIGN

Author:

DAOUD HOUDA1,BENSELEM SAMIR1,ZOUARI SONIA1,LOULOU MOURAD1

Affiliation:

1. University of Sfax, Tunisia, National Engineering School of Sfax, Information Technologies and Electronics Laboratory, BP W 3038 Sfax, Tunisia

Abstract

This paper deals with the prediction of primary parameters of CMOS transistor for upcoming process using the robust Bisquare Weights method which is able to provide solutions to the challenges of some parameters of Nanoscale CMOS. Predicted parameters for 45 nm to 22 nm process nodes are obtained in order to solve design challenges generated by Nanoscale process. These predicted primary parameters are helpful to estimate the performance of a basic element circuit having a key role in the design of upcoming analog systems. Comparisons between predictive technology model data and predicted parameters are used to check the validity of the used method. As a study case, we will detail the behavior of optimized telescopic operational transconductance amplifier performance with process scaling.

Publisher

World Scientific Pub Co Pte Lt

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Electrical and Electronic Engineering,Hardware and Architecture

Reference19 articles.

1. Predictive technology model for nano-CMOS design exploration

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3. S. A. Wepster, Between Theory and Observations (Springer-Verlag, 2009) p. 246.

4. A. Björck, Numerical Methods for Least Squares Problems, Society for Industrial and Applied Mathematics (SIAM, North Holland) p. 408.

5. G. A. F. Seber and C. J. Wild, Nonlinear Regression (John Wiley and Sons, New York, 2003) p. 768.

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