ASIC and FPGA Comparative Study for IoT Lightweight Hardware Security Algorithms

Author:

Samir Nagham1,Hussein Abdelrahman Sobeih2,Khaled Mohaned1,El-Zeiny Ahmed N.1,Osama Mahetab1,Yassin Heba1,Abdelbaky Ali1,Mahmoud Omar1,Shawky Ahmed1,Mostafa Hassan13ORCID

Affiliation:

1. Electronics and Communications Engineering Department, Faculty of Engineering, Cairo University, Giza 12613, Egypt

2. Computers and Systems Engineering Department, Faculty of Engineering, Mansoura University, Mansoura 35516, Egypt

3. Nanotechnology and Nanodevices Program, Zewail City of Science and Technology, Giza, Cairo, Egypt

Abstract

Data security, privacy and authenticity are crucial in wireless data transmission. Low power consumption is the main requirement for any chip design targeting the Internet of Things (IoT) applications. In this research paper, a comparative study of eight authenticated encryption and decryption algorithms, selected from the “Competition for Authenticated Encryption: Security, Applicability and Robustness” (CAESAR), namely, ACORN, ASCON, CLOC, JOLTIK, MORUS, PRIMATEs, SCREAM and SILC, is presented. The FPGA and ASIC implementations of these eight algorithms are synthesized, placed and routed. Power, area, latency and throughput are measured for all algorithms. All results are analyzed to determine the most suitable algorithm for IoT applications. These results show that ACORN algorithm exhibits the lowest power consumption of the eight studied at the expense of lower throughput and higher latency. MORUS algorithm gives the highest throughput among the eight selected algorithms at the expense of large area utilization.

Publisher

World Scientific Pub Co Pte Lt

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Electrical and Electronic Engineering,Hardware and Architecture

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2. A Robust ASCON Cryptographic Coprocessor for Secure IoT Applications;2024 Panhellenic Conference on Electronics & Telecommunications (PACET);2024-03-28

3. LiCryptor: High-Speed and Compact Multi-Grained Reconfigurable Accelerator for Lightweight Cryptography;IEEE Transactions on Circuits and Systems I: Regular Papers;2024

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