Design Techniques for Ultra-Low Voltage Comparator Circuits

Abstract

This paper presents a novel low-voltage rail-to-rail comparator circuit and derives optimal transistor size ratios for both conventional latch-based and the proposed comparators which operate in transistor subthreshold region. The obtained analytical results serve well as guidelines for designing low-voltage comparators and the proposed circuit is significantly faster than existing rail-to-rail comparator designs in ultra-low voltage operation.