NONRESTORING RADIX-2k SQUARE ROOTING ALGORITHM

Abstract

This paper presents a new high radix square rooting algorithm where a number of square root bits (one digit) are generated in one step. Therefore, the proposed algorithm offers a higher speed than that of the conventional bit parallel binary one. This algorithm can be considered as a generalisation of the conventional bit parallel binary algorithm, and therefore it can be implemented using the existing simple binary elements. The proposed algorithm makes use only of the odd values of the square root to generate the possible values of the radicand and therefore, it requires less area than the conventional restoring high radix algorithm which uses all the values of the square root. This algorithm is general for any radix. Any adder can be used in the basic cell, it can be a carry ripple adder or a carry lookahead adder. As an example of a radix-2k square root architecture, a 9-bit radix-23 architecture is presented in this paper.