Techniques to Reduce π/4-Parity-Phase Circuits, Motivated by the ZX Calculus-Reference-Cited by-同舟云学术

Techniques to Reduce π/4-Parity-Phase Circuits, Motivated by the ZX Calculus

Author:

de Beaudrap Niel¹,Bian Xiaoning²,Wang Quanlong³

Affiliation:

1. Department of Computer Science, University of Oxford

2. Department of Mathematics and Statistics, Dalhousie University

3. Department of Computer Science, University of Oxford; Cambridge Quantum Computing Ltd.

Publisher

Open Publishing Association

Reference13 articles.

2. A Finite Presentation of CNOT-Dihedral Operators;Amy;Electronic Proceedings in Theoretical Computer Science,2018

3. Polynomial-Time T-Depth Optimization of Clifford+T Circuits Via Matroid Partitioning;Amy;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,2014

4. A meet-in-the-middle algorithm for fast synthesis of depth-optimal quantum circuits;Amy;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,2013

5. T-count optimization and Reed-Muller codes;Amy;IEEE Transactions on Information Theory,2019

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