Wrapper Scan Chains Design for Rapid and Low Power Testing of Embedded Cores
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Published:2005-09-01
Issue:9
Volume:E88-D
Page:2126-2134
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ISSN:0916-8532
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Container-title:IEICE Transactions on Information and Systems
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language:en
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Short-container-title:IEICE Transactions on Information and Systems
Publisher
Institute of Electronics, Information and Communications Engineers (IEICE)
Subject
Artificial Intelligence,Electrical and Electronic Engineering,Computer Vision and Pattern Recognition,Hardware and Architecture,Software
Cited by
1 articles.
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1. Test Compression;VLSI Test Principles and Architectures;2006