Effect of BIST Pretest on IC Defect Level
-
Published:2006-10-01
Issue:10
Volume:E89-D
Page:2626-2636
-
ISSN:0916-8532
-
Container-title:IEICE Transactions on Information and Systems
-
language:en
-
Short-container-title:IEICE Transactions on Information and Systems
Author:
NAKAMURA Y.,SAVIR J.,FUJIWARA H.
Publisher
Institute of Electronics, Information and Communications Engineers (IEICE)
Subject
Artificial Intelligence,Electrical and Electronic Engineering,Computer Vision and Pattern Recognition,Hardware and Architecture,Software