A digital receiver signal strength detector for multi-standard low-IF receivers
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Published:2018-09-04
Issue:
Volume:16
Page:51-57
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ISSN:1684-9973
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Container-title:Advances in Radio Science
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language:en
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Short-container-title:Adv. Radio Sci.
Author:
Saalfeld Tobias,Piwczyk Tobias,Wunderlich Ralf,Heinen Stefan
Abstract
Abstract. This paper presents a receiver signal strength detector based on a discrete
Fourier transform implementation. The energy detection algorithm has been
designed and measured using a custom multi-standard transceiver ASIC with a
low-IF receiver at 0.5, 1 and 2 MHz IF. The proposed implementation
directly processes the single bit ΔΣ modulator data and features
a clear channel assessment for arbitrary modulation schemes without energy
consuming demodulation. Continuous monitoring of the derivative of the RSSI
takes advantage of faster coefficient convergence for higher power levels and
reduces computation time. A dynamic range of 65 dB has been achieved
in FPGA based measurements with a linearity error of less than
1.2 dB. Furthermore, synthesis results for an on-chip implementation
for an 130 nm RF CMOS technology show an overall power consumption of
1.5 mW during calculation.
Publisher
Copernicus GmbH
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