A generator tool for Carry Look-ahead Adders (CLA)

Author:

Ziouzios Dimitris,Tsiktsiris Dimitris,Baras Nikolaos,Bibi Stamatia,Dasygenis Minas

Abstract

A carry look-ahead adder (CLA) is a digital circuit which is used widely used in any electronic computational device to improve speed calculation by reducing the time required to define carry bits. Despite the fact that CLA is used massively in modern digital systems, there is no online tool to automatically generate the HDL description. For this reason we developed a cloud based tool to automate the design of optimized CLA and provide custom testbenches to verify their correctness for singed and unsigned numbers. It is also can be used by the students to create and understand deeply the way CLA works.

Publisher

EDP Sciences

Reference11 articles.

1. Cheng F. C. et al. “Delay-Insensitive Carry-lookahead Adders”. In: VLSI Design, 1997. Proceedings. 1997, pp. 322–328.

2. Dahiya Sandeep and Kumar Rajender. “Performance Analysis of Different Bit Carry Look Ahead Adder Using VHDL Environment”. In: International Journal of Engineering Science and Innovative Technology (IJESIT) 2 (July 2013). Issue 4.

3. Daveau Jean-Marc et al. “VHDL generation from SDL specifications”. In: Springer US, 1997. Chap. Part of the IFIP — The International Federation for Information Processing book series (IFIPAICT).

4. Force I. E. T.. Introducing JSON. Sept. 2013. url: http://www.json.org.

5. Gokhale M. et al. “Streamoriented FPGA computing in the Streams-C high level language”. In: IEEE Field-Programmable Custom Computing Machines. 2000, pp. 49–56.

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