A P-N Sequence Generator Using LFSR with Dual Edge Trigger Technique-Reference-Cited by-同舟云学术

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A P-N Sequence Generator Using LFSR with Dual Edge Trigger Technique

Published:2016 Issue: Volume:57 Page:01016
ISSN:2261-236X
Container-title:MATEC Web of Conferences
language:
Short-container-title:MATEC Web of Conferences

Author:

Naghwal Nitin Kumar,Kumar Abhishek

Publisher

EDP Sciences

Subject

General Medicine

Link

http://www.matec-conferences.org/10.1051/matecconf/20165701016/pdf

Reference14 articles.

1. Timing-Error-Detecting Dual-Edge-Triggered Flip-Flop

2. Comparative analysis of master-slave latches and flip-flops for high-performance and low-power systems

3. Nedovic Nikola; Aleksic M.; Oklobdzija V.G., “Conditional pre-charge techniques for powerefficient dual-edge clocking,” Low Power Electronics and Design. Proceedings of the 2002 International Symposium, vol. 3, pp.56-59, 2002.

4. The Optimal Fan-Out of Clock Network for Power Minimization by Adaptive Gating

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