Design and Characterization of 10 kV High Voltage 4H-SiC p-Channel IGBTs with Low V_F

Abstract

The 10 kV silicon carbide p-channel insulated gate bipolar transistors (IGBTs) with low forward voltage drop (VF) have been fabricated and characterized successfully. The novel edge termination structure of Four-Region Multistep Field Limiting Rings (FRM-FLRs) and the optimum JFET region design proposed in our previous work is adopted to improve the blocking performance and the on-state characteristics. The fabricated device with a chip size of 6 mm × 6 mm and an active area of 0.16 cm2 exhibits a high blocking voltage of -10 kV with a small leakage current below -200 nA. Meanwhile, a low forward voltage drop of -8 V at the collector current of -10 A with a gate bias of -20 V is obtained at room temperature, corresponding to a current density of 62.5 A/cm2. Besides, a lower gate leakage current is measured less than 2 nA at the gate voltage of -30 V. Experimental results demonstrate that a better trade-off between the blocking voltage and the on-state characteristics is achieved for the fabricated device, which is desirable for the high power applications.