High-K Gate Dielectric for High-Performance SiC Power MOSFET Technology with Low Interface Trap Density, Good Oxide Lifetime (t_tddb≥ 10⁴s), and High Thermal Stability (≥ 800 °C)

Abstract

In this work, we demonstrate SiC/high-κ MOS capacitors with low leakage density of 10-8 Acm-2, good device uniformity, good thermal stability (> 800 °C), and longer oxide lifetime > 104 s simultaneously. This is enabled by using atomic layer deposition (ALD) processed- HfAlO as the gate dielectric with a thickness of 35 nm, smooth surface (RMS roughness =0.70 nm), and high-quality SiC/ HfAlO interface with interface density (Dit) of 8×1010 eV-1cm-2.