I/O Coherence Faulty Tolerance Method for Multi-Core Processor Based on Retry

Author:

Guo Yu Feng1,Zhang Ming1,Gong Rui1

Affiliation:

1. National University of Defense Technology

Abstract

I/O Consistency problem is one of the key issues which Multi-Cores Processor design must face. With increasing of core number and complicating of cache level, the probability of I/O coherence packets blocked would increase, which would decrease I/O system efficiency significantly. An I/O coherence maintaining method based on retransmission is proposed to improve reliability of the I/O coherence protocol. Experimental results demonstrate that this method can enhance the robustness of I/O coherence protocol effectively.

Publisher

Trans Tech Publications, Ltd.

Reference8 articles.

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2. Deng Rangyu, Chen Haiyan, et al. A parallel stream memory architecture for heterogeneous multi-core processor[J]. Chinese Journal of Electronics, 2009, 37(2): 312-317. (in Chinese).

3. Goodman J. R. Cache consistency and Sequential Consistency[R]. SCI Committee, 1991. 1-4.

4. Strenstrom, P, A survey of cache coherence schemes for multiprocessors[J]. IEEE Computer 1990, 23(6): 12-24.

5. http: /www. cs. virginia. edu/stream/stream2.

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