An Integrated Ramp Generator for PWM Voltage Regulators

Author:

Huang Xiao Zong1,Liu Lun Cai1,Huang Wen Gang1,Luo Jun1,Zhu Dong Mei1

Affiliation:

1. Sichuan Institute of Solid-State Circuits

Abstract

An integrated ramp generator is presented in this paper. For traditional implementations, the amplitude clamp is realized with zener diode to limit the output voltage to ±VZ, while the zener diode is not available for standard CMOS process. The transmission gate is utilized to make the output voltage in the determined range. The reference voltage is provided by a bandgap voltage reference with temperature compensation, which guarantees the temperature stabilization of the frequency of the ramp generator. The ramp generator was fabricated in a commercial CMOS process. The frequency of 44kHz is achieved under the power supply of 3.5V, and the frequency variation of 41kH to 46kHz with the power supply of 3.3V to 5V.

Publisher

Trans Tech Publications, Ltd.

Reference5 articles.

1. J.B. Jia and K.N. Leung, Integrated ramp generator with auto-set systeretic comparator for PWM voltage regulators, Electronics Letters, Vol. 43, No. 24, 2007 : 1384 – 1385.

2. Xia ji, Wang Dong-xu. Implementation of a CMOS Sawtooth-Wave, Microelectronic, Vol. 32, No. 3, 2002 : 228-230.

3. F. Azais,S. Bernard and Y. Bertrand et al, Analog built-in saw-tooth generator for ADC histogram test, Microelectronics Journal, Vol. 33, No. 10, 2002: 781-789.

4. Behzad Razavi, Design of Analog CMOS Integrated Circuit, New York: McGraw-Hill, 2000. 1.

5. P.E. Allen and D.R. Holberg, CMOS Analog Circuit Design, 2nd edn., Oxford University Press, (2002).

同舟云学术

1.学者识别学者识别

2.学术分析学术分析

3.人才评估人才评估

"同舟云学术"是以全球学者为主线,采集、加工和组织学术论文而形成的新型学术文献查询和分析系统,可以对全球学者进行文献检索和人才价值评估。用户可以通过关注某些学科领域的顶尖人物而持续追踪该领域的学科进展和研究前沿。经过近期的数据扩容,当前同舟云学术共收录了国内外主流学术期刊6万余种,收集的期刊论文及会议论文总量共计约1.5亿篇,并以每天添加12000余篇中外论文的速度递增。我们也可以为用户提供个性化、定制化的学者数据。欢迎来电咨询!咨询电话:010-8811{复制后删除}0370

www.globalauthorid.com

TOP

Copyright © 2019-2024 北京同舟云网络信息技术有限公司
京公网安备11010802033243号  京ICP备18003416号-3