Affiliation:
1. Science and Technology on Analog Integrated Circuit Laboratory
2. Southwest Integrated Circuit Design CO. LTD
Abstract
An analysis of the output impedance of the reference buffer for pipelined ADC is presented is this paper. To achieve high performance of the reference buffer, damping network has added in. The output impedance of buffer amplifier is made equal to the resistance of the damping network. As a result, the effective impedance is made independent of frequency. Spectre simulation with 14-bit 250MSPS pipelined ADC loads, the results show the settling time can be achieved 1.2 ns with 0.0023% precision, and the noise floor per bin is-114dB with the power consumption is 42.3mW. The reference buffer can meet the requirement of 14-bit up to 800MSPS pipelined ADC.
Publisher
Trans Tech Publications, Ltd.
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