A Design of Improved Base64 Encoding Algorithm Based on FPGA

Abstract

Base64 is one of the most common encoding styles to transfer 8 byte code in the internet. Base64 is used widely, through which the data is usually put in URL. However, the mark % as a wildcard will be generated after encoding by standard Base64. Therefore, Base64 after URL encoded could not be directly stored in the database. To solve the problem, this essay presents a improved Base64, which can be directly stored in the database. The reconfigurable and flexibility of FPGA, the design by Verilog HDL and the comprehensive line used by Quartus II 13.0 can be achieved. Eventually, adaptation to the DE2 development board is tested. Practice has proved that there are many merits of the system, such as: simple structure, fast operation speed and good flexibility and so on.