4H-SiC Pseudo-CMOS Logic Inverters for Harsh Environment Electronics

Author:

Kuroki Shinichiro1,Kurose Tatsuya1,Nagatsuma Hirofumi1,Ishikawa Seiji1,Maeda Tomonori1,Sezaki Hiroshi1,Kikkawa Takamaro1,Makino Takahiro2,Ohshima Takeshi2,Östling Mikael3,Zetterling Carl Mikael3

Affiliation:

1. Hiroshima University

2. National Institutes for Quantum and Radiological Science and Technology (QST)

3. KTH Royal Institute of Technology

Abstract

For logic gate with higher voltage swing, 4H-SiC pseudo-CMOS logic inverter with four nMOS was suggested and demonstrated, and a high voltage swing of 4.4 V was achieved at VDD=5 V. Simple nMOS inverters were also investigated. Both of pseudo-CMOS and nMOS inverters were operated at a high temperature of 200°C. For future SiC large integrated circuits, junction leakage current between n+ regions were also investigated with the comb-shaped test elements.

Publisher

Trans Tech Publications, Ltd.

Subject

Mechanical Engineering,Mechanics of Materials,Condensed Matter Physics,General Materials Science

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