Abstract
The path to commericializing a 4H-SiC power PiN diode has faced many difficult
challenges. In this work, we report a 50 A, 10 kV 4H-SiC PiN diode technology where good crystalline quality and high carrier lifetime of the material has enabled a high yielding process with VF as low as 3.9 V @ 100 A/cm2. Furthermore, incorporation of two independent basal plane dislocation reduction processes (LBPD 1 and LBPD 2) have produced a large number of devices
that exhibit a high degree of forward voltage stability with encouraging reverse blocking capability. This results in a total yield (forward, 10 kV blocking, and drift) of >20% for 8.7 mm x 8.7 mm power PiN diode chips—the largest SiC chip reported to date.
Publisher
Trans Tech Publications, Ltd.
Subject
Mechanical Engineering,Mechanics of Materials,Condensed Matter Physics,General Materials Science
Reference4 articles.
1. M.K. Das: Latest Advances in 4H-SiC PiN and MOS Power Devices (International Semiconductor Device Research Symposium, Washington, DC, December 2003).
2. H. Lendenmann, F. Dahlquist, J.P. Bergman, H. Bleichner and C. Hallin, Mater. Sci. Forum, Vol. 389-393 (2002) p.1259.
3. J.J. Sumakeris, M.K. Das, H.M. Hobgood, S.G. Mueller, M.J. Paisley, J.W. Palmour, and C.H. Carter, Jr.: Mater. Sci. Forum, Vol. 457-460 (2004) p.1113.
4. B.A. Hull, M.K. Das, J.J. Sumakeris, J. Richmond, and S. Krishnaswami: Drift Free, 10 kV, 20 A, 4H-SiC PiN Diodes (Electronic Materials Conference, South Bend, IN, June 2004).
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