Affiliation:
1. Inner Mongolia University
2. Kunming University of Science and Technology
Abstract
A kind of shared multi-channel on-chip memory architecture (SMC-OCM) for embedded CMPs is proposed in this article. To implement SMC-OCM architecture, the sharable multi-channel on-chip memory (MC-OCM) is designed and implemented based on FPGA. The characteristic of multiple data channel of MC-OCM assures good parallel responsiveness of SMC-OCM system. Experiments showed that the access latency of SMC-OCM is lower than that of the-state-of arts. SMC-OCM architecture satisfies the performance requirements for memory system by embedded applications
Publisher
Trans Tech Publications, Ltd.
Cited by
1 articles.
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