Affiliation:
1. King Mongkut’s Institute of Technology Ladkrabang
2. National Electronics and Computer Center
Abstract
This paper presents the defect distribution and yield analysis on silicon wafer. The generation and recombination lifetime were the key parameters and obtained from the currentvoltage and the capacitancevoltage of diode characteristics for forward bias. Then 3D contour maps were plotted as defect distribution and can be analyzed for the whole wafer which is useful for the yield analysis of the defects that were caused from fabrication process.
Publisher
Trans Tech Publications, Ltd.
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