A Low Power Way-Predicting D-Cache with Partial Tag Comparison Filter

Abstract

This paper proposes a way-predicting algorithm which is specially equipped with a Partial Tag Comparison Filter (PTCF) to reduce the energy consumption in high associative D-caches. Conventional way-predicting algorithm achieves good performance and energy efficiency on I-cache which usually can guarantee the high prediction accuracy. However, the D-cache usually cannot reach such high prediction accuracy; therefore it suffers unavoidably from severe prediction inaccuracy penalties. The introduced PTCF aims at reducing energy penalties in case of prediction-miss and thus brings improvement in energy efficiency. The experiments show that the new D-cache reduces energy consumption by about 20%~60% without any latency degradation compared to conventional way-predicting D-cache.