Study on Signal Integrity Simulation for High Speed Serial Rapid IO

Author:

Jiang Hong Xu1,Zhang Xiao Hong1,Zhao Wei1,Lu Jin Yuan2

Affiliation:

1. Beihang University

2. China United Network Communications Corporation

Abstract

With the increases of signal transmission rate in digital systems, the signal integrity becomes increasingly important in high-speed circuit design. During the hardware design of high-speed serial Rapid IO, signal integrity simulation of 5Gbps high-speed serial bus had been carried out by using Channel Analysis tools. Reliable data was formed by effectively analysis and evaluation of pre-simulation, the signal quality of high-speed serial Rapid IO was verified by post-simulation. The non-ideal design parameters were optimized by referring to the effective data obtained in pre-simulation. Signal quality has been greatly improved by parameters optimization. Signal integrity simulation analysis and verification of serial Rapid IO provides strong support for the design and significantly improves the efficiency of hardware design.

Publisher

Trans Tech Publications, Ltd.

Reference6 articles.

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3. H. Y. Hou (2008) Signal Integrity Simulation of Rapid IO High Speed Serial Bus, Telecommunication Engineering 3(5): 67-70.

4. Xilinx Instruments (2010) Virtex-5 FPGA Rocket IO GTX Transceiver IBIS-AMI Signal Integrity Simulation kit User Guide. www. xilinx. com. UG588(V1. 1), February 12, 10–12.

5. J. Hu, J. W. Li, Y. S. Cao (2009) SI Analysis and Design of the Gaps Serial Link, Computer Engineer & Science, 7th end 4(4): 861-864.

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