Study for Interrupt Controller S3C2410X of Embedded System

Abstract

Interrupt handling in out-of-order execution processors requires complex hardware schemes to maintain the sequential state. By managing the interaction with external systems through effective use of interrupts can dramatically improve system efficiency and the use of processing resources. The actual process of determining a good handling method can be complicated, challenging and fun. Numerous actions are occurring simultaneously at a single point and these actions have to be handled fast and efficiently. The paper will provide a practical guide to designing an interrupt handler and discuss the various trade-offs between the different methods. The interrupt handling process of S3C2410X is described, normally, S3C2410X interrupt controller requests interrupt from kernel interrupt FIQ or IRQ of S3C2410X after the interrupt arbitration. The experiment purpose and experiment equipment is detailed listed. Finally, the author explored into the experiment principle and experiment procedure.