Improvement of the Current Gain Stability of SiC Junction Transistors

Author:

Sundaresan Siddarth1,Grummel Brian2,Hamilton Dean3,Singh Ranbir2

Affiliation:

1. GeneSiC Semiconductor

2. GeneSiC Semiconductor, Inc.

3. University of Warwick

Abstract

SiC Junction Transistors (SJTs) with 1900 V Drain-Source breakdown voltages, current gain (hFE) higher than 120 and low on-resistance of 22 mΩ (3.5 mΩ-cm2) are reported in this paper. SJTs with a pre-stress hFE of 90 suffer only a 10% reduction of the hFE after 190 hours under a 200 A/cm2 DC current stress at a TJ of 125°C, while a similar stress on earlier generation SJTs resulted in over 25% hFE reduction in only 25 hours. SJT die with pre-stress hFE in the range of 120-125 show absolutely no current gain degradation even after a 300°C/ 2 hour stress at 60 A/cm2 DC drain current.

Publisher

Trans Tech Publications, Ltd.

Subject

Mechanical Engineering,Mechanics of Materials,Condensed Matter Physics,General Materials Science

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