Effect of FOUP Atmosphere Control on Process Wafer Integrity in Sub20 nm Device Fabrication

Abstract

Defects could be generated on the wafers by the particle contamination, formation of organic residue, corrosion, native oxide growth on the surface and airborne molecular contaminants (AMC) [1] etc. These problems hinder the device performance and also can decrease the yield and productivity in the semiconductor manufacturing process. It could be resolved by various cleaning methods [2]. However, the results such as corrosion, native oxide growth on wafer and AMC deposition should be handled properly by N2 gas purge prevention method during the process or standby [3,4]. It should be implemented before starting the process, which can maximize the productivity with a higher yield by minimizing the process queue and maintaining wafer surface integrity in sub 20 nm device fabrication.