Non-Linear Mathematical Modelling for Phase Locked Loop

Abstract

Design of Phase Locked Loop (PLL) plays a vital role in transceiver field. Phase Locked Loop comprises of three blocks, namely Phase and frequency detector, loop filter and voltage-controlled oscillator. The greater advancements in CMOS technology such as high frequency, high speed, low noise and phase error leads to low-cost PLL This work aims to develop higher order non-linear models of general Phase Locked Loop. The condition of stability and choice of loop filter is also determined. Based on the analysis, the transfer function for PLL is determined.