Countering power analysis attacks by exploiting characteristics of multicore processors-Reference-Cited by-同舟云学术

Countering power analysis attacks by exploiting characteristics of multicore processors

Published:2018 Issue:7 Volume:15 Page:20180084-20180084
ISSN:1349-2543
Container-title:IEICE Electronics Express
language:en
Short-container-title:IEICE Electron. Express

Author:

Yang Jianwei¹,Dai Fan¹,Wang Jielin¹,Zeng Jianmin²,Zhang Zhang²,Han Jun¹,Zeng Xiaoyang¹

Affiliation:

1. State Key Laboratory of ASIC and System, Fudan University

2. School of Electronic Science and Applied Physics, Hefei University of Technology

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Link

https://www.jstage.jst.go.jp/article/elex/15/7/15_15.20180084/_pdf

Reference18 articles.

1. [1] P. Kocher, et al.: “Differential power analysis,” CRYPTO (1999) 388 (DOI: 10.1007/3-540-48405-1_25).

2. [2] J.-S. Coron and I. Kizhvatov: “Analysis and improvement of the random delay countermeasure of CHES 2009,” CHES (2010) 95 (DOI: 10.1007/978-3-642-15031-9_7).

3. [3] N. Veyrat-Charvillon, et al.: “Shuffling against side-channel attacks: A comprehensive study with cautionary note,” Proc. of the 18th International Conference on The Theory and Application of Cryptology and Information Security (2012) 740 (DOI: 10.1007/978-3-642-34961-4_44).

4. [4] C. Clavier, et al.: “Differential power analysis in the presence of hardware countermeasures,” CHES (2000) 252 (DOI: 10.1007/3-540-44499-8_20).

5. [5] P. C. Kocher, et al.: U.S. Patent 7587044 (2009).

Cited by 3 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A side-channel-attack countermeasure for elliptic curve point multiplication based on dynamic power compensation;IEICE Electronics Express;2022-06-25

2. A novel SCA-resilience flip-flop design utilizing the current mode logic based on the three-independent-gate field effect transistors;IEICE Electronics Express;2021-08-25

3. Maya: Using Formal Control to Obfuscate Power Side Channels;2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA);2021-06