A 1.8-nW sub-1-V self-biased sub-bandgap reference for low-power systems-Reference-Cited by-同舟云学术

A 1.8-nW sub-1-V self-biased sub-bandgap reference for low-power systems

Published:2021 Issue: Volume: Page:
ISSN:1349-2543
Container-title:IEICE Electronics Express
language:en
Short-container-title:IEICE Electron. Express

Author:

Hu Jinlong¹,Liang Ke²,Wang Jin²,Li Guofeng¹²

Affiliation:

1. Tianjini Key Laboratory of Optoelectronic Sensor and Sensing Network Technology, College of Electronic Information and Optical Engineering, Nankai University

2. Engineering Research Center of Thin Film Optoelectronics Technology, Ministry of Education, Nankai University

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Link

https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_18.20210204/_pdf

Reference33 articles.

1. [1] Lee I, et al.: “A Subthreshold Voltage Reference With Scalable Output Voltage for Low-Power IoT Systems,” IEEE J. Solid-State Circuits 52 (2017) 1443 (DOI: 10.1109/JSSC.2017.2654326).

2. [2] H. Jiang, et al.: “A 0.4-V 0.93-nW/kHz relaxation oscillator exploiting comparator temperature-dependent delay to achieve 94-ppm/°C stability,” IEEE J. Solid-State Circuits 53 (2018) 3004 (DOI: 10.1109/JSSC.2018.2859834).

3. [3] Xu HC, et al.: “Pico-Ampere Voltage References for IoT Systems,” IEEE international symposium on circuits and systems 1 (2019) 1 (DOI: 10.1109/ISCAS.2019.8702375).

4. [4] Q. Duan, J. Roh: “A 1.2-V 4.2-ppm/°C High-order Curvature-Compensated CMOS Bandgap Reference,” IEEE Transactions on Circuits & Systems I Regular Papers 62 (2015) 662 (DOI:10.1109/TCSI.2014.2374832).

5. [5] Leung N, Mok T: “A sub-1-V 15-ppm/°C CMOS bandgap voltage reference without requiring low threshold voltage device,” IEEE J. Solid-State Circuits 37 (2002) 526 (DOI: 10.1109/4.991391).

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A 353pW, 0.014%/V line sensitivity self-biased CMOS voltage reference with source degeneration active load;IEICE Electronics Express;2024-01-25

2. A 2.2ppm/°C compensated bandgap voltage reference with a double-ended current trimming technique;IEICE Electronics Express;2022-11-10