Embedded multiport data buffer for a solid-state drive controller-Reference-Cited by-同舟云学术

Embedded multiport data buffer for a solid-state drive controller

Published:2021-05-10 Issue:9 Volume:18 Page:20210132-20210132
ISSN:1349-2543
Container-title:IEICE Electronics Express
language:en
Short-container-title:IEICE Electron. Express

Author:

Liu Hailuan¹,Fan Lingyan¹,Luo Jianjun¹,Feng Guorui²

Affiliation:

1. Microelectronics Research Institute of Hangzhou Dianzi University

2. Shanghai University

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Link

https://www.jstage.jst.go.jp/article/elex/18/9/18_18.20210132/_pdf

Reference30 articles.

1. [1] L.-P. Chang and T.-W. Kuo: “An adaptive striping architecture for flash memory storage systems of embedded systems,” IEEE Proceedings Real-Time and Embedded Technology and Applications Symposium (2002) 187 (DOI: 10.1109/RTTAS.2002.1137393).

2. [2] K. Takeuchi: “Novel co-design of NAND flash memory and NAND flash controller circuits for sub-30 nm low-power high-speed solid-state drives (SSD),” IEEE J. Solid-State Circuits 44 (2009) 1227 (DOI: 10.1109/JSSC.2009.2014027).

3. [3] K. Smith: “LSI corporation, understanding SSD over-provisioning,” EDN Network (2013).

4. [4] J. Luo, et al.: “Solid-state drive controller with embedded RAID functions,” IEICE Electron. Express 11 (2014) 20140419 (DOI: 10.1587/elex.11.20140419).

5. [5] L. Zuolo, et al.: “Solid-state drives memory driven design methodologies for optimal performance,” Proc. IEEE 105 (2017) 1589 (DOI: 10.1007/978-981-13-0599-3_7).

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