Affiliation:
1. System LSI Research Center, Kyushu University
Publisher
Institute of Electronics, Information and Communications Engineers (IEICE)
Subject
Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials
Reference7 articles.
1. [1] S. Rodriguez and B. Jacob, “Energy/Power breakdown of pipelined nanometer caches (90nm/65nm/45nm/32nm), ” Proc. International Symposium on Low Power Electronic and Design (ISLPED'06), pp. 25-30, 2006.
2. Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits
3. [3] V. G. Moshnyaga and K. Inoue, “Low-power cache design, ” in Low-Power Electronics Design, ed. C. Piguet, CRC Press, 2005.
4. [4] International Technology Roadmap for Semiconductors--Design, 2006 update, [Online]http://www.itrs.net/Links/2006Update/ 2006UpdateFinal.htm
5. [5] S. Borkar, T. Karnik, S. Narendra, J. Tschanz, A. Keshavarzi, and V. De, “Parameter variations and impact on circuits and microarchitecture, ” Proc. Design Automation Conference (DAC'03), pp. 338-342, 2003.