Built-in hardware pseudo-random test module for Physical Unclonable Functions-Reference-Cited by-同舟云学术

Built-in hardware pseudo-random test module for Physical Unclonable Functions

Published:2014 Issue:2 Volume:5 Page:101-112
ISSN:2185-4106
Container-title:Nonlinear Theory and Its Applications, IEICE
language:en
Short-container-title:NOLTA

Author:

Lee Jae Seong¹,Choi Piljoo¹,Kim Song-Ju²,Choi Byong-Deok¹,Kim Dong Kyue¹

Affiliation:

1. Department of Electronics Engineering, Hanyang University

2. Atomic Electronics Group, WPI Center for Materials Nanoarchitectonics National Institute for Materials Science

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Rehabilitation,Physical Therapy, Sports Therapy and Rehabilitation,General Medicine

Link

https://www.jstage.jst.go.jp/article/nolta/5/2/5_101/_pdf

Reference23 articles.

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3. [3] K. Lofstrom, W.R. Daasch, and D. Taylor, “IC identification circuit using device mismatch,” Solid-State Circuits Conference, 2000. Digest of Technical Papers. ISSCC. 2000 IEEE International, pp. 372-373, February 2000.

4. [4] D. Lim, J.W. Lee, B. Gassend, G.E. Suh, M. Van Dijk, and S. Devadas, “Extracting secret keys from integrated circuits,” Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 13, pp. 1200-1205, October 2005.

5. [5] J. Guajardo, S.S. Kumar, G.-J. Schrijen, and P. Tuyls, “FPGA intrinsic PUFs and their use for IP protection,” Cryptographic Hardware and Embedded Systems-CHES 2007, vol. 4727, pp. 63-80, September 2007.

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