Reliability evaluation of logic circuits based on transient faults propagation metrics-Reference-Cited by-同舟云学术

Reliability evaluation of logic circuits based on transient faults propagation metrics

Published:2017 Issue:7 Volume:14 Page:20170128-20170128
ISSN:1349-2543
Container-title:IEICE Electronics Express
language:en
Short-container-title:IEICE Electron. Express

Author:

Cai Shuo¹,Yu Fei¹,Wang Weizheng¹,Liu Tieqiao²,Liu Peng³,Wang Wei¹

Affiliation:

1. Hunan Provincial Key Laboratory of Intelligent Processing of Big Data on Transportation & College of Computer and Communication Engineering, Changsha University of Science and Technology

2. College of management, Hangzhou Dianzi University

3. College of Information Science & Engineering, Hunan University

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Link

https://www.jstage.jst.go.jp/article/elex/14/7/14_14.20170128/_pdf

Reference10 articles.

1. [1] S. Borkar: “Designing reliable systems from unreliable components: The challenges of transistor variability and degradation,” IEEE Micro 25 (2005) 10 (DOI: 10.1109/MM.2005.110).

2. [2] B. Narasimhamet al.: “Characterization of digital signal event transient pulse-widths in 130-nm and 90-nm CMOS technologies,” IEEE Trans. Nucl. Sci. 54 (2007) 2506 (DOI: 10.1109/TNS.2007.910125).

3. [3] M. Omana, et al.: “A model for transient fault propagation in combinatorial logic,” Proc. On-Line Test. Symp (2003) 111 (DOI: 10.1109/OLT.2003.1214376).

4. [4] S. Sivaswamy, et al.: “Estimation and optimization of reliability of noisy digital circuits,” Proc. ISQED (2009) 213 (DOI: 10.1109/ISQED.2009.4810296).

5. [5] I. Polianet al.: “Modeling and mitigating transient errors in logic circuits,” IEEE Trans. Depend. Secure Comput. 8 (2011) 537 (DOI: 10.1109/TDSC.2010.26).

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