An Energy-Efficient Task Scheduling for Near Real-Time Systems on Heterogeneous Multicore Processors

Author:

NAKADA Takashi1,YANAGIHASHI Hiroyuki2,IMAI Kunimaro3,UEKI Hiroshi4,TSUCHIYA Takashi4,HAYASHIKOSHI Masanori4,NAKAMURA Hiroshi2

Affiliation:

1. Nara Institutet of Science and Technology

2. The University of Tokyo

3. Proassist Ltd

4. Renesas Electronics Corporation

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Artificial Intelligence,Electrical and Electronic Engineering,Computer Vision and Pattern Recognition,Hardware and Architecture,Software

Reference19 articles.

1. [1] W. Huang and Y. Wang, “An optimal speed control scheme supported by media servers for low-power multimedia applications,” Multimedia Systems, vol.15, no.2, pp.113-124, 2009. 10.1007/s00530-009-0153-5

2. [2] M. Weiser, B. Welch, A. Demers, and S. Shenker, “Scheduling for reduced CPU energy,” Proc. 1st USENIX Conference on Operating Systems Design and Implementation, OSDI '94, 1994. 10.1007/978-0-585-29603-6_17

3. [3] F. Yao, A. Demers, and S. Shenker, “A scheduling model for reduced CPU energy,” Proc. 36th Annual Symposium on Foundations of Computer Science, pp.374-382, 1995. 10.1109/sfcs.1995.492493

4. [4] G. Chen, K. Huang, and A. Knoll, “Energy optimization for real-time multiprocessor system-on-chip with optimal DVFS and DPM combination,” ACM Trans. Embed. Comput. Syst., vol.13, no.3s, pp.111:1-111:21, 2014. 10.1145/2567935

5. [5] M.E.T. Gerards and J. Kuper, “Optimal DPM and DVFS for frame-based real-time systems,” ACM Trans. Archit. Code Optim., vol.9, no.4, pp.41:1-41:23, 2013. 10.1145/2400682.2400700

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